I'm a doctoral researcher in the Department of Electrical Engineering at IIT Ropar, working on analog and digital CMOS integrated circuits — including PRBS generators, low-dropout regulators (LDOs), and analog & digital phase-locked loops (PLLs).
Analog & Digital CMOS IC Design IIT Ropar Electrical Engineering
Currently working on
PRBS generators : High-speed pseudo-random bit sequence circuits for serial link testing.
Low-dropout regulators (LDOs): on-chip power management for noise-sensitive analog blocks.
Analog PLLs: Fractional N DSM based frequency synthesis with low jitter.
Digital PLLs: Fractional N DSM based all-digital architectures for scalable, process-portable clocking.